prikaz prve stranice dokumenta IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU
Access restricted to students and staff of home institution
master's thesis
IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU
Rijeka: University of Rijeka, Faculty of Engineering, 2016. urn:nbn:hr:190:175952

University of Rijeka
Faculty of Engineering

Cite this document

Jurković, I. (2016). IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU (Master's thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:190:175952

Jurković, Ivan. "IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU." Master's thesis, University of Rijeka, Faculty of Engineering, 2016. https://urn.nsk.hr/urn:nbn:hr:190:175952

Jurković, Ivan. "IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU." Master's thesis, University of Rijeka, Faculty of Engineering, 2016. https://urn.nsk.hr/urn:nbn:hr:190:175952

Jurković, I. (2016). 'IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU', Master's thesis, University of Rijeka, Faculty of Engineering, accessed 24 July 2021, https://urn.nsk.hr/urn:nbn:hr:190:175952

Jurković I. IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU [Master's thesis]. Rijeka: University of Rijeka, Faculty of Engineering; 2016 [cited 2021 July 24] Available at: https://urn.nsk.hr/urn:nbn:hr:190:175952

I. Jurković, "IZRADA VREMENSKO DIGITALNOG PRETVORNIKA (TDC) U FPGA SKLOPOVLJU", Master's thesis, University of Rijeka, Faculty of Engineering, Rijeka, 2016. Available at: https://urn.nsk.hr/urn:nbn:hr:190:175952

Islandora Bookmark - Please login to use this feature