Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6

Barbarić, Dominik

prikaz prve stranice dokumenta Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6

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undergraduate thesis

Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6

Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. urn:nbn:hr:168:338484

Barbarić, Dominik

University of Zagreb
Faculty of Electrical Engineering and Computing

Cite this document

APA 6th Edition

Barbarić, D. (2015). Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6 (Undergraduate thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:338484

MLA 8th Edition

Barbarić, Dominik. "Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. https://urn.nsk.hr/urn:nbn:hr:168:338484

Chicago 17th Edition

Barbarić, Dominik. "Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. https://urn.nsk.hr/urn:nbn:hr:168:338484

Harvard

Barbarić, D. (2015). 'Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6', Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 19 November 2024, https://urn.nsk.hr/urn:nbn:hr:168:338484

Vancouver

Barbarić D. Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6 [Undergraduate thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2015 [cited 2024 November 19] Available at: https://urn.nsk.hr/urn:nbn:hr:168:338484

IEEE

D. Barbarić, "Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6", Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2015. Available at: https://urn.nsk.hr/urn:nbn:hr:168:338484

Cite this item: https://urn.nsk.hr/urn:nbn:hr:168:338484

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Metadata

Title	Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6
Title (english)	Implementation of software defined receiver on Spartan 6 FPGA devices
Author	Dominik Barbarić
Mentor	Mladen Vučić (mentor)
Committee member	Mladen Vučić (predsjednik povjerenstva)
Committee member	Davor Petrinović (član povjerenstva)
Committee member	Ana Sović Kržić (član povjerenstva)
Granter	University of Zagreb Faculty of Electrical Engineering and Computing Zagreb
Defense date and country	2015-07-13, Croatia
Scientific / art field, discipline and subdiscipline	TECHNICAL SCIENCES Computing
Scientific / art field, discipline and subdiscipline	TECHNICAL SCIENCES Electrical Engineering
Abstract	U radu je opisana prilagodba programski definiranog prijamnika dizajniranog za Spartan 3 platformu na Spartan 6 platformu korištenjem sklopa FMC150 s ugrađenim A/D i D/A pretvornicima. Opisane su značajke Spartan 6 platforme, razvojnog sustava Avnet Spartan-6 LX150T i sklopa 4DSP FMC150. Razrađuje se postupak inicijalizacije i konfiguracije svih komponenata sustava s naglaskom na implementaciju SPI konfiguracijskog sučelja.
Abstract (english)	The topic of this thesis is adaptation of a software defined radio receiver designed for the Spartan 3 platform to the Spartan 6 platform using the 4DSP FMC150 analog-digital circuit with integrated A/D and D/A converters. The main features of Spartan 6 platform, Avnet Spartan-6 LX150T development board and 4DSP FMC150 analog-digital circuit are described. The procedure for initialization and configuration of all components of the system is elaborated with emphasis on the implementation of SPI configuration interface.
Keywords
Keywords (english)
Language	croatian
URN:NBN	urn:nbn:hr:168:338484
Study programme	Title: Electrical Engineering and Information Technology Study programme type: university Study level: undergraduate Academic / professional title: sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike i informacijske tehnologije (sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike i informacijske tehnologije)
Type of resource	Text
File origin	Born digital
Access conditions	Closed access
Terms of use
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Repository	FER Repository
Created on	2018-02-06 07:44:11